Performance of Processor-Memory Interconnections for Multiprocessors
IEEE Transactions on Computers
IEEE Journal on Selected Areas in Communications
The Knockout Switch: A Simple, Modular Architecture for High-Performance Packet Switching
IEEE Journal on Selected Areas in Communications
A Broadband Packet Switch for Integrated Transport
IEEE Journal on Selected Areas in Communications
Sunshine: a high performance self-routing broadband packet switch architecture
IEEE Journal on Selected Areas in Communications
Queueing in high-performance packet switching
IEEE Journal on Selected Areas in Communications
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In this paper, we investigate a scheduling algorithm, called the Circular Window Control (CWC) scheme, for packet switch fabrics. The scheme is simple and efficient. It uses a fixed length window with circular transmission sequences to minimize possible switch and output contentions. The scheme can attain a maximal throughput of 100% in non-blocking switches as well as Banyan-based blocking switches. The performance analyses and simulation results of the CWC scheme are also presented.