The Connex Array™ as a neural network accelerator
CI '07 Proceedings of the Third IASTED International Conference on Computational Intelligence
Evolvable block-based neural network design for applications in dynamic environments
VLSI Design - Special issue on selected papers from the midwest symposium on circuits and systems
Artificial neural network engine: parallel and parameterized architecture implemented in FPGA
PReMI'05 Proceedings of the First international conference on Pattern Recognition and Machine Intelligence
| Hi-index | 0.00 |
First Page of the Article