Digital Circuit Optimization via Geometric Programming
Operations Research
Particle swarm optimization based inverter design considering transient performance
Digital Signal Processing
Digital Integrated Circuits
Investigation of particle swarm optimization for switching characterization of inverter design
Expert Systems with Applications: An International Journal
Extraction and use of neural network models in automated synthesis of operational amplifiers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ANN- and PSO-Based Synthesis of On-Chip Spiral Inductors for RF ICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
This paper presents a technique for the modeling and design of a nano scale CMOS inverter circuit using artificial neural network and particle swarm optimization algorithm such that the switching characteristics of the circuit is symmetric, that is, has nearly equal rise and fall time and equal output high-to-low and low-to-high propagation delay. The channel width of the transistors and the load capacitor value are taken as design parameters. The designed circuit has been implemented at the transistor-level and simulated using TSPICE for 45 nm process technology. The PSO-generated results have been compared with SPICE results. A very good accuracy has been achieved. In addition, the advantage of the present approach over an existing approach for the same purpose has been demonstrated through simulation results.