Timing assumptions and verification of finite-state concurrent systems
Proceedings of the international workshop on Automatic verification methods for finite state systems
Theoretical Computer Science
Model checking
Introduction to Automata Theory, Languages and Computability
Introduction to Automata Theory, Languages and Computability
Theory of Modeling and Simulation
Theory of Modeling and Simulation
A Real-Time Discrete Event System Specification Formalismfor Seamless Real-Time Software Development
Discrete Event Dynamic Systems
Rational time-advance DEVS (RTA-DEVS)
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
Model continuity in the design of dynamic distributed real-time systems
IEEE Transactions on Systems, Man, and Cybernetics, Part A: Systems and Humans
Revisit of system variable trajectories (WIP)
Proceedings of the Symposium on Theory of Modeling & Simulation - DEVS Integrative M&S Symposium
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This paper introduces a qualitative verification methodology for a subclass of RTDEVS(Real-Time Discrete Event System Specification) [4], called Finite RTDEVS(FRTDEVS). Sub-classing FRTDEVS from RTDEVS aims to generate a finite structure of reachability graph for a given network of FRTDEVS. Since the reachability graph is isomorphic to a given FRTDEVS network in terms of their behaviors, it enables us to verify some qualitative properties of the target system. In order to demonstrate a practical usage of the reachability graph, we illustrate how to check safety and liveness monorail systems modeled by FRTDEVS networks.