Communicating sequential processes
Communicating sequential processes
Supervisory control of a class of discrete event processes
SIAM Journal on Control and Optimization
Formal methods for the specification and design of real-time safety critical systems
Journal of Systems and Software
Theoretical Computer Science
SIAM Journal on Control and Optimization
A framework for verifying discrete event models within a DEVS-based system development methodology
Transactions of the Society for Computer Simulation International
An Efficient State Space Generation for the Analysis of Real-Time Systems
IEEE Transactions on Software Engineering
A Real-Time Discrete Event System Specification Formalismfor Seamless Real-Time Software Development
Discrete Event Dynamic Systems
Deciding Properties of Timed Transition Models
IEEE Transactions on Parallel and Distributed Systems
Real time simulation framework for RT-DEVS models
Transactions of the Society for Computer Simulation International - Recent advances in DEVS methodology--part II
Temporal verification of RT-DEVS models with implementation aspects
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
Rational time-advance DEVS (RTA-DEVS)
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
I-DEVS: imprecise real-time and embedded DEVS modeling
Proceedings of the 2011 Symposium on Theory of Modeling & Simulation: DEVS Integrative M&S Symposium
Real-time network-on-chip simulation modeling
Proceedings of the 5th International ICST Conference on Simulation Tools and Techniques
Qualitative verification of finite and real-time DEVS networks
Proceedings of the 2012 Symposium on Theory of Modeling and Simulation - DEVS Integrative M&S Symposium
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This article presents an application of the Discrete Event System Specification (DEVS) framework to the design and safety analysis of a real-time embedded control system, a railroad crossing control system. The authors employ an extension of the DEVS formalism, real-time DEVS (RT-DEVS), which has a sound semantics for the specification of real-time systems in a hierarchical modular fashion. The notion of a clock matrix for communicating RT-DEVS models is proposed, which represents a global time between the models. Based on the composition rules and the clock matrix, an algorithm for the generation of a timed reachability tree is developed that can be used for safety analysis at two phases: an untimed and timed analysis phase. A railroad crossing control example demonstrates that the proposed analysis for RT-DEVS models would be effective to verify the safety property of real-time control systems.