Parallel DEVS: a parallel, hierarchical, modular, modeling formalism
WSC '94 Proceedings of the 26th conference on Winter simulation
Theory of Modeling and Simulation
Theory of Modeling and Simulation
A Real-Time Discrete Event System Specification Formalismfor Seamless Real-Time Software Development
Discrete Event Dynamic Systems
Real time simulation framework for RT-DEVS models
Transactions of the Society for Computer Simulation International - Recent advances in DEVS methodology--part II
A Power and Performance Model for Network-on-Chip Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
The M5 Simulator: Modeling Networked Systems
IEEE Micro
Designing an interface for real-time and embedded DEVS
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
DART: a programmable architecture for NoC simulation on FPGAs
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
ACM SIGARCH Computer Architecture News
I-DEVS: imprecise real-time and embedded DEVS modeling
Proceedings of the 2011 Symposium on Theory of Modeling & Simulation: DEVS Integrative M&S Symposium
NoC simulation modeling in DEVS-suite
Proceedings of the 2011 Symposium on Theory of Modeling & Simulation: DEVS Integrative M&S Symposium
Proceedings of the 2012 Symposium on Theory of Modeling and Simulation - DEVS Integrative M&S Symposium
Observations on real-time simulation design and experimentation
Proceedings of the Symposium on Theory of Modeling & Simulation - DEVS Integrative M&S Symposium
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We present a Network on Chip (NoC) model with basic support for execution in constrained real-time. Actions for the processing element, switch, network interface, and channel components of NoC are specified in RT-DEVS, an extension of the DEVS formalism for real-time modeling. A desirable simulator must execute the actions defined in each NoC component within finite time periods. Execution of components' actions is supported by introducing a new capability to the DEVS-Suite simulator such that actions can be executed in real-time. The extended simulator can be used to develop, simulate, and evaluate the class of NoC designs that the underlying computing platform can support. NoC simulation can be used to obtain measurements such as system throughput and latency metrics under different communication patterns. This work offers a basis for future research where a NoC simulation can be embedded in a physical environment and thus enable NoC application designs and experimentations.