Rational time-advance DEVS (RTA-DEVS)

Authors:
Hesham Saadawi;Gabriel Wainer
Affiliations:
Carleton University, Ottawa, ON, Canada;Carleton University, Ottawa, ON, Canada
Venue:
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
Year:
2010

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Abstract

This paper introduces a new extension to the DEVS formalism, called Rational Time-Advance DEVS. The basic idea of this new formalism is to permit modeling the behavior of systems that can be modeled by classical DEVS; however, RTA-DEVS models could be formally checked with standard model-checking algorithms and tools. In order to do so, we introduce a procedure to create Timed Automata models that are behaviorally equivalent to the original RTA-DEVS models. This therefore, enables the use of the available TA tools and theories for formal model checking.