A Preemptive Scheduling Mechanism for Accurate Behavioral Simulation of Digital Designs
IEEE Transactions on Computers
Theoretical Computer Science
Specification and design of embedded systems
Specification and design of embedded systems
A timed Full LOTOS with time/action tree semantics
Theories and experiences for real-time system development
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
UPPAAL—a tool suite for automatic verification of real-time systems
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
GDEVS: A generalized discrete event specification for accurate modeling of dynamic systems
Transactions of the Society for Computer Simulation International
Theoretical Computer Science
Theory of Modelling and Simulation
Theory of Modelling and Simulation
Petri Net Theory and the Modeling of Systems
Petri Net Theory and the Modeling of Systems
Theory of Modeling and Simulation
Theory of Modeling and Simulation
FTRTFT '96 Proceedings of the 4th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Liveness in Timed and Untimed Systems
ICALP '94 Proceedings of the 21st International Colloquium on Automata, Languages and Programming
Synthesizing scenarios to DEVS models
Proceedings of the 2008 Spring simulation multiconference
Semantics for model-based validation of continuous/discrete systems
Proceedings of the conference on Design, automation and test in Europe
Rational time-advance DEVS (RTA-DEVS)
SpringSim '10 Proceedings of the 2010 Spring Simulation Multiconference
Controlled experimentation with agents: models and implementations
ESAW'04 Proceedings of the 5th international conference on Engineering Societies in the Agents World
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In this paper, we present the formal transformation of Timed Input/Output Automata into simulation models, expressed in the DEVS formalism. This transformation takes place in an approach of a validation of high-level specifications by simulation. The validation is based on the simulation of a coupled model built with the system to be controlled and the control specifications. An example of this approach is given in the paper.