Analytical approaches for performance evaluation of networks-on-chip

  • Authors:
  • Abbas Eslami Kiasari;Axel Jantsch;Marco Bekooij;Alan Burns;Zhonghai Lu

  • Affiliations:
  • KTH Royal Institute of Technology, Stockholm, Sweden;KTH Royal Institute of Technology, Stockholm, Sweden;University of Twente, Enschede, Netherlands;University of York, York, United Kingdom;KTH Royal Institute of Technology, Stockholm, Sweden

  • Venue:
  • Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
  • Year:
  • 2012

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Abstract

This tutorial reviews four popular mathematical formalisms -- dataflow analysis, schedulability analysis, network calculus, and queueing theory -- and how they have been applied to the analysis of Network-on-Chip (NoC) performance. We review the basic concepts and results of each formalism and provide examples of how they have been used in on-chip communication performance analysis. The tutorial also discusses the respective strengths and weaknesses of each formalism, their suitability for a specific purpose, and the attempts that have been made to bridge these analytical approaches. Finally, we conclude the tutorial by discussing open research issues.