The implications of shared data synchronization techniques on multi-core energy efficiency

Authors:
Ashok Gautham;Kunal Korgaonkar;Patanjali Slpsk;Shankar Balachandran;Kamakoti Veezhinathan
Affiliations:
Department of Computer Science and Engineering, IIT Madras;Department of Computer Science and Engineering, IIT Madras and IBM Research Lab, Bangalore, India;Department of Computer Science and Engineering, IIT Madras;Department of Computer Science and Engineering, IIT Madras;Department of Computer Science and Engineering, IIT Madras
Venue:
HotPower'12 Proceedings of the 2012 USENIX conference on Power-Aware Computing and Systems
Year:
2012

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Abstract

Shared data synchronization is at the heart of the multicore revolution since it is essential for writing concurrent programs. Ideally, a synchronization technique should be able to fully exploit the available cores, leading to improved performance. However, with the growing demand for energy-efficient systems, it also needs to work within the energy and power budget of the system. In this paper, we perform a detailed study of the performance as well as energy efficiency of popular shared-data synchronization techniques on a commodity multicore processor. We show that Software Transactional Memory (STM) systems can perform better than locks for workloads where a significant portion of the running time is spent in the critical sections. We also show how power-conserving techniques available on modern processors like C-states and clock frequency scaling impact energy consumption and performance. Finally, we compare the performance of STMs and locks under similar power budgets.