RAPL: memory power estimation and capping

  • Authors:

  • Howard David;Eugene Gorbatov;Ulf R. Hanebutte;Rahul Khanna;Christian Le

  • Affiliations:

  • Intel, Hillsboro, OR, USA;Intel, Hillsboro, OR, USA;Intel, Hillsboro, OR, USA;Intel, Hillsboro, OR, USA;Intel, Hillsboro, OR, USA

  • Venue:
  • Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
  • Year:
  • 2010

Quantified Score

Hi-index 0.02

Visualization

Abstract

The drive for higher performance and energy efficiency in data-centers has influenced trends toward increased power and cooling requirements in the facilities. Since enterprise servers rarely operate at their peak capacity, efficient power capping is deemed as a critical component of modern enterprise computing environments. In this paper we propose a new power measurement and power limiting architecture for main memory. Specifically, we describe a new approach for measuring memory power and demonstrate its applicability to a novel power limiting algorithm. We implement and evaluate our approach in the modern servers and show that we achieve up to 40% lower performance impact when compared to the state-of-art baseline across the power limiting range.