Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Simultaneous multithreading: maximizing on-chip parallelism
25 years of the international symposia on Computer architecture (selected papers)
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
The benefits of event: driven energy accounting in power-sensitive systems
EW 9 Proceedings of the 9th workshop on ACM SIGOPS European workshop: beyond the PC: new challenges for the operating system
Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques
IATAC: a smart predictor to turn-off L2 cache lines
ACM Transactions on Architecture and Code Optimization (TACO)
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling
Proceedings of the 32nd annual international symposium on Computer Architecture
Queue - Multiprocessors
Chip multithreading systems need a new operating system scheduler
Proceedings of the 11th workshop on ACM SIGOPS European workshop
Techniques for Multicore Thermal Management: Classification and New Exploration
Proceedings of the 33rd annual international symposium on Computer Architecture
Benchmarking mesh and hierarchical bus networks in system-on-chip context
Journal of Systems Architecture: the EUROMICRO Journal
No "power" struggles: coordinated multi-level power management for the data center
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
Internet-scale service infrastructure efficiency
Proceedings of the 36th annual international symposium on Computer architecture
MLP-aware dynamic cache partitioning
HiPEAC'08 Proceedings of the 3rd international conference on High performance embedded architectures and compilers
Virtual machine power metering and provisioning
Proceedings of the 1st ACM symposium on Cloud computing
RAPL: memory power estimation and capping
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
An analysis of power consumption in a smartphone
USENIXATC'10 Proceedings of the 2010 USENIX conference on USENIX annual technical conference
Fine-grained power modeling for smartphones using system call tracing
Proceedings of the sixth conference on Computer systems
Simulating Whole Supercomputer Applications
IEEE Micro
Evaluating the effectiveness of model-based power characterization
USENIXATC'11 Proceedings of the 2011 USENIX conference on USENIX annual technical conference
Energy accounting for shared virtualized environments under DVFS using PMC-based power models
Future Generation Computer Systems
ANEPROF: Energy Profiling for Android Java Virtual Machine and Applications
ICPADS '11 Proceedings of the 2011 IEEE 17th International Conference on Parallel and Distributed Systems
Complete System Power Estimation Using Processor Performance Events
IEEE Transactions on Computers
Power containers: an OS facility for fine-grained power and energy management on multicore servers
Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems
Accurate Fine-Grained Processor Power Proxies
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
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Accurately determining the energy consumed by each task in a system will become of prominent importance in future multicore-based systems because it offers several benefits, including (i) better application energy/performance optimizations, (ii) improved energy-aware task scheduling, and (iii) energy-aware billing in data centers. Unfortunately, existing methods for energy metering in multicores fail to provide accurate energy estimates for each task when several tasks run simultaneously. This article makes a case for accurate Per-Task Energy Metering (PTEM) based on tracking the resource utilization and occupancy of each task. Different hardware implementations with different trade-offs between energy prediction accuracy and hardware-implementation complexity are proposed. Our evaluation shows that the energy consumed in a multicore by each task can be accurately measured. For a 32-core, 2-way, simultaneous multithreaded core setup, PTEM reduces the average accuracy error from more than 12% when our hardware support is not used to less than 4% when it is used. The maximum observed error for any task in the workload we used reduces from 58% down to 9% when our hardware support is used.