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In this paper, we present our experience on integrating timing constraint verification and analysis, by using the real-time scheduling theory, in an industrial context. The verification process has been integrated into a design flow at THALES Communications & Security. We focus our work on Software Radio Protocols (SRP). We have used Model-Driven Engineering technologies and the Cheddar schedulability analysis tool for our experiment. We show how we have modeled a complete SRP in UML MARTE, a profile for real-time embedded systems, before using model transformation to extract information for schedulability analysis with Cheddar.