Theoretical Computer Science
Deciding Linear Inequalities by Computing Loop Residues
Journal of the ACM (JACM)
Message Sequence Graphs and Decision Problems on Mazurkiewicz Traces
MFCS '99 Proceedings of the 24th International Symposium on Mathematical Foundations of Computer Science
Model Checking of Message Sequence Charts
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
Partial Order Path Technique for Checking Parallel Timed Automata
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
A partial order semantics approach to the clock explosion problem of timed automata
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
A theory of regular MSC languages
Information and Computation
Distributed time-asynchronous automata
ICTAC'07 Proceedings of the 4th international conference on Theoretical aspects of computing
Automata and logics for timed message sequence charts
FSTTCS'07 Proceedings of the 27th international conference on Foundations of software technology and theoretical computer science
Timed unfoldings for networks of timed automata
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Symbolic unfoldings for networks of timed automata
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Regular set of representatives for time-constrained MSC graphs
Information Processing Letters
Checking coverage for infinite collections of timed scenarios
CONCUR'07 Proceedings of the 18th international conference on Concurrency Theory
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Verifying systems involving both time and concurrency rapidly leads to undecidability, and requires restrictions to become effective. This paper addresses the emptiness problem for time-constrained MSC-Graphs (TC-MSC graphs for short), that is, checking whether there is a timed execution compatible with a TC-MSC graph specification. This problem is known to be undecidable in general [11], and decidable for some regular specifications [11]. We establish decidability of the emptiness problem under the condition that, for a given K, no path of the TC-MSC graph forces any node to take more than K time units to complete. We prove that this condition can be effectively checked. The proofs use a novel symbolic representation for runs, where time constraints are encoded as a system of inequalities. This allows us to handle non-regular specifications and improve efficiency w.r.t. using interleaved representations.