A PCI-based Volume Rendering Accelerator

  • Authors:
  • Günter Knittel

  • Affiliations:
  • Universität Tübingen, Wilhelm-Schickard-Institut für Infonnatik-Graphisch-Interaktive Systeme, Tübingen, Gennany

  • Venue:
  • EGGH'95 Proceedings of the Tenth Eurographics conference on Graphics Hardware
  • Year:
  • 1995

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Abstract

We discuss the underlying algorithms, design principles and implementation issues of an extremely compact and cost-efficient volume rendering accelerator for PCI-based systems. It operates on classified and shaded data sets which have been coded and compressed using Redundant Block Compression (RBC), a technique originating from 2D-imaging and extended to 3D. This specific encoding scheme reduces drastically the required data traffic between the volume memory and the processing units. Thus, the volume data set can be placed into the main memory of the host, eliminating the need of a separate volume memory. Furthermore, the tri-linear interpolation needed for perspective raycasting is very much simplified for RBC-transformed data sets. All in all, these techniques allow a volume rendering accelerator to be implemented as a singlechip coprocessor, or as an FPGA-based prototype for monochrome data sets as presented in this work. Although using a lossy compression scheme, image quality is still high, and expected frame rates are between 2 and 5Hz for typical data sets of 2563 voxels.