Optimization principles for arithmetic functions in hardware-software co-design

Authors:
Vladimir Delengov;Yuan Li;Jennifer Thompson;Lukas Kroc;Nandakishore Santhi;Stephan Eidenbenz
Affiliations:
Claremont Graduate University, Claremont, CA;Claremont Graduate University, Claremont, CA;Claremont Graduate University, Claremont, CA;Claremont Graduate University, Claremont, CA;Los Alamos National Laboratory, Los Alamos, NM;Los Alamos National Laboratory, Los Alamos, NM
Venue:
Proceedings of the Winter Simulation Conference
Year:
2012

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Abstract

As traditional hardware scaling laws have started to break down, Co-Design of hardware and software has become the most promising avenue towards exa-scale computing. We present a bottom-up approach as part of a larger project that develops an optimization framework for computational codesign for molecular dynamics applications. Our approach finds optimum circuit designs for arithmetic functions, such as square root or multiplication, which are the basic building blocks of the domain-specific arithmetic calculations in molecular dynamics simulations. Our design approach employs the Boolean satisfiability problem (SAT) as a vehicle for circuit design, using state-of-the-art SAT solvers that show their algorithmic power on mid-range performance computing platforms to rein in the inevitable combinatorial explosion of possible circuit designs as we increase the bit-length of our operations. While the main emphasis is on the modeling methodology, we show initial results of automated designs for a 4-bit square root circuit and a mini-calculator.