SRAM dynamic stability verification by reachability analysis with consideration of threshold voltage variation

Authors:
Yang Song;Hao Yu;Sai Manoj Pudukotai Dinakarrao;Guoyong Shi
Affiliations:
Shanghai Jiao Tong University, Shanghai, China;Nanyang Technological University, Singapore, Singapore;Nanyang Technological University, Singapore, Singapore;Shanghai Jiao Tong University, Shanghai, China
Venue:
Proceedings of the 2013 ACM international symposium on International symposium on physical design
Year:
2013

Citing 7
Cited 1

Verifying analog oscillator circuits using forward/backward abstraction refinement

Proceedings of the conference on Design, automation and test in Europe: Proceedings
Statistical analysis of SRAM cell stability

Proceedings of the 43rd annual Design Automation Conference
SRAM dynamic stability: theory, variability and analysis

Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Accurate estimation of SRAM dynamic stability

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Fast Non-Monte-Carlo Yield Analysis and Optimization by Stochastic Orthogonal Polynomials

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Formal verification of phase-locked loops using reachability analysis and continuization

Proceedings of the International Conference on Computer-Aided Design
Reachability of uncertain linear systems using zonotopes

HSCC'05 Proceedings of the 8th international conference on Hybrid Systems: computation and control

Performance bound analysis of analog circuits in frequency- and time-domain considering process variations

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Quantified Score

Hi-index	0.00

Visualization

Abstract

Dynamic stability margin of SRAM is largely suppressed at nano-scale due to not only dynamic noise but also process variation. A novel dynamic stability verification is developed in this paper based on analog reachability analysis for checking SRAM failure. In the presence of mismatch such as threshold voltage variation of all transistors, zonotope-based reachability analysis is deployed to efficiently verify SRAM failure at transistor level. The threshold voltage variation is considered by the modified input range of SRAM. As such, the suppressed stability margin and further failure region can be verified by performing a time-evolved reachability analysis with formed zonotope to distinguish safe and failure regions. One can perform efficient verification of the SRAM dynamic stability without repeated yet time-consuming Monte-Carlo simulations considering variations from all transistors. As demonstrated by numerical experiment results, the developed reachability analysis can accurately verify the SRAM dynamic stability under threshold voltage variations from all transistors. Speedup of more than 400x in runtime can be achieved over the Monte Carlo approach of 500 samples with the similar accuracy.