Fast evaluation of elementary mathematical functions with correctly rounded last bit
ACM Transactions on Mathematical Software (TOMS)
Table-driven implementation of the exponential function in IEEE floating-point arithmetic
ACM Transactions on Mathematical Software (TOMS)
IEEE Transactions on Computers
Implementation of the Exponential Function in a Floating-Point Unit
Journal of VLSI Signal Processing Systems
FPGA Resource Reduction Through Truncated Multiplication
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
A Library of Parameterized Floating-Point Modules and Their Use
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Quantitative analysis of floating point arithmetic on FPGA based custom computing machines
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
FPGAs vs. CPUs: trends in peak floating-point performance
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
An Exponentiation Unit for an OpenGL Lighting Engine
IEEE Transactions on Computers
Algorithm and Architecture for Logarithm, Exponential, and Powering Computation
IEEE Transactions on Computers
FPGA-Based Implementation of a Robust IEEE-754 Exponential Unit
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Table-based polynomials for fast hardware function evaluation
ASAP '05 Proceedings of the 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors
Floating-Point Accumulation Circuit for Matrix Applications
FCCM '06 Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Advanced Components in the Variable Precision Floating-Point Library
FCCM '06 Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Elementary Functions: Algorithms and Implementation
Elementary Functions: Algorithms and Implementation
Return of the hardware floating-point elementary function
ARITH '07 Proceedings of the 18th IEEE Symposium on Computer Arithmetic
Parameterized floating-point logarithm and exponential functions for FPGAs
Microprocessors & Microsystems
Accelerating Molecular Dynamics Simulations with Reconfigurable Computers
IEEE Transactions on Parallel and Distributed Systems
High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware
IEEE Transactions on Computers
An Efficient Rounding Boundary Test for {\rm pow}(x, y) in Double Precision
IEEE Transactions on Computers
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Accelerating Calculations on the RASC Platform: A Case Study of the Exponential Function
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Radix-16 Evaluation of Certain Elementary Functions
IEEE Transactions on Computers
Multipliers for floating-point double precision and beyond on FPGAs
ACM SIGARCH Computer Architecture News
FPL '10 Proceedings of the 2010 International Conference on Field Programmable Logic and Applications
Designing Custom Arithmetic Data Paths with FloPoCo
IEEE Design & Test
Measuring the Gap Between FPGAs and ASICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The high performance and capacity of current FPGAs makes them suitable as acceleration co-processors. This article studies the implementation, for such accelerators, of the floating-point power function xy as defined by the C99 and IEEE 754-2008 standards, generalized here to arbitrary exponent and mantissa sizes. Last-bit accuracy at the smallest possible cost is obtained thanks to a careful study of the various subcomponents: a floating-point logarithm, a modified floating-point exponential, and a truncated floating-point multiplier. A parameterized architecture generator in the open-source FloPoCo project is presented in details and evaluated.