Lottery scheduling: flexible proportional-share resource management
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
The PARSEC benchmark suite: characterization and architectural implications
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Accelerating critical section execution with asymmetric multi-core architectures
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
Bottleneck identification and scheduling in multithreaded applications
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
HPCA '12 Proceedings of the 2012 IEEE 18th International Symposium on High-Performance Computer Architecture
Speedup stacks: Identifying scaling bottlenecks in multi-threaded applications
ISPASS '12 Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software
DSN '12 Proceedings of the 2012 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
When less is more (LIMO):controlled parallelism forimproved efficiency
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Composite Cores: Pushing Heterogeneity Into a Core
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
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Near-Threshold Computing (NTC) is an effective technique to improve energy efficiency. However, single thread performance can suffer dramatically in NTC systems as cores must be run at low frequency to ensure proper operation. A potential way to solve this problem is to accelerate a core for a short period of time using dynamic voltage and frequency scaling (DVFS). This fast-mode execution option must be selectively applied so as to not sacrifice the overall efficiency of the NTC system. To this end, this paper presents a novel software framework to improve the performance of multithreaded programs through smart scheduling of the fast mode cores. Our framework statically analyzes a target application and instruments dynamic monitoring and priority management code into the program. At runtime, the probabilistic scheduler assigns the cores to the fast mode according to the priority set by the instrumented code. In this way, the program critical path is dynamically accelerated by spending more time in the fast mode so that the overall performance gets improved.