Accelerating critical section execution with asymmetric multi-core architectures

  • Authors:

  • M. Aater Suleman;Onur Mutlu;Moinuddin K. Qureshi;Yale N. Patt

  • Affiliations:

  • The University of Texas at Austin, Austin, TX, USA;Carnegie Mellon University, Seattle, WA, USA;IBM Research, Yorktown Hieghts, NY, USA;The University of Texas at Austin, Austin, TX, USA

  • Venue:
  • Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
  • Year:
  • 2009

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Abstract

To improve the performance of a single application on Chip Multiprocessors (CMPs), the application must be split into threads which execute concurrently on multiple cores. In multi-threaded applications, critical sections are used to ensure that only one thread accesses shared data at any given time. Critical sections can serialize the execution of threads, which significantly reduces performance and scalability. This paper proposes Accelerated Critical Sections (ACS), a technique that leverages the high-performance core(s) of an Asymmetric Chip Multiprocessor (ACMP) to accelerate the execution of critical sections. In ACS, selected critical sections are executed by a high-performance core, which can execute the critical section faster than the other, smaller cores. As a result, ACS reduces serialization: it lowers the likelihood of threads waiting for a critical section to finish. Our evaluation on a set of 12 critical-section-intensive workloads shows that ACS reduces the average execution time by 34% compared to an equal-area 32T-core symmetric CMP and by 23% compared to an equal-area ACMP. Moreover, for 7 out of the 12 workloads, ACS improves scalability by increasing the number of threads at which performance saturates.