Energy/power breakdown of pipelined nanometer caches (90nm/65nm/45nm/32nm)
Proceedings of the 2006 international symposium on Low power electronics and design
Enhanced leakage reduction techniques using intermediate strength power gating
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Multiview video coding based on rectified epipolar lines
ICICS'09 Proceedings of the 7th international conference on Information, communications and signal processing
Run-time adaptive energy-aware motion and disparity estimation in multiview video coding
Proceedings of the 48th Design Automation Conference
Proceedings of the International Conference on Computer-Aided Design
Adaptive power management of on-chip video memory for multiview video coding
Proceedings of the 49th Annual Design Automation Conference
On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture
IEEE Transactions on Circuits and Systems for Video Technology
Level C+ data reuse scheme for motion estimation with corresponding coding orders
IEEE Transactions on Circuits and Systems for Video Technology
Efficient Prediction Structures for Multiview Video Coding
IEEE Transactions on Circuits and Systems for Video Technology
Coding Algorithms for 3DTV—A Survey
IEEE Transactions on Circuits and Systems for Video Technology
AMBER: adaptive energy management for on-chip hybrid video memories
Proceedings of the International Conference on Computer-Aided Design
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This work presents an energy-efficient memory hierarchy for Motion and Disparity Estimation on Multiview Video Coding employing a Reference Frames-Centered Data Reuse (RCDR) scheme. In RCDR the reference search window becomes the center of the motion/disparity estimation processing flow and calls for processing all blocks requesting its data. By doing so, RCDR avoids multiple search window retransmissions leading to reduced number of external memory accesses, thus memory energy reduction. To deal with out-of-order processing and further reduce external memory traffic, a statistics-based partial results compressor is developed. The on-chip video memory energy is reduced by employing a statistical power gating scheme and candidate blocks reordering. Experimental results show that our reference-centered memory hierarchy outperforms the state-of-the-art [7][13] by providing reduction of up to 71% for external memory energy, 88% on-chip memory static energy, and 65% on-chip memory dynamic energy.