Wireless interconnect for board and chip level

Authors:
Gerhard P. Fettweis;Najeeb ul Hassan;Lukas Landau;Erik Fischer
Affiliations:
Dresden University of Technology (TU Dresden), Dresden, Germany;Dresden University of Technology (TU Dresden), Dresden, Germany;Dresden University of Technology (TU Dresden), Dresden, Germany;Dresden University of Technology (TU Dresden), Dresden, Germany
Venue:
Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2013

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Abstract

Electronic systems of the future require a very high bandwidth communications infrastructure within the system. This way the massive amount of compute power which will be available can be inter-connected to realize future powerful advanced electronic systems. Today, electronic inter-connects between 3D chipstacks, as well as intra-connects within 3D chipstacks are approaching data rates of 100 Gbit/s soon. Hence, the question to be answered is how to efficiently design the communications infrastructure which will be within electronic systems. Within this paper approaches and results for building this infrastructure for future electronics are addressed.