A novel framework for applying multiobjective GA and PSO based approaches for simultaneous area, delay, and power optimization in high level synthesis of datapaths

Authors:
D. S. Harish Ram;M. C. Bhuvaneswari;Shanthi S. Prabhu
Affiliations:
Department of Electronics and Communication Engineering, Amrita Vishwa Vidyapeetham University, Coimbatore, India;Department of Electrical and Electronics Engineering, PSG College of Technology, Coimbatore, India;Department of Electronics and Communication Engineering, Amrita Vishwa Vidyapeetham University, Coimbatore, India
Venue:
VLSI Design - Special issue on New Algorithmic Techniques for Complex EDA Problems
Year:
2012

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Abstract

High-Level Synthesis deals with the translation of algorithmic descriptions into an RTL implementation. It is highly multiobjective in nature, necessitating trade-offs between mutually conflicting objectives such as area, power and delay. Thus design space exploration is integral to the High Level Synthesis process for early assessment of the impact of these trade-offs. We propose a methodology for multi-objective optimization of Area, Power and Delay during High Level Synthesis of data paths from Data Flow Graphs (DFGs). The technique performs scheduling and allocation of functional units and registers concurrently. A novel metric based technique is incorporated into the algorithm to estimate the likelihood of a schedule to yield low-power solutions. A truemulti-objective evolutionary technique, "Nondominated Sorting Genetic Algorithm II" (NSGA II) is used in this work. Results on standard DFG benchmarks indicate that the NSGA II based approach is much faster than a weighted sum GA approach. It also yields superior solutions in terms of diversity and closeness to the true Pareto front. In addition a framework for applying another evolutionary technique: Weighted Sum Particle Swarm Optimization (WSPSO) is also reported. It is observed that compared to WSGA, WSPSO shows considerable improvement in execution time with comparable solution quality.