Embedding repeaters in silicon IPs for cross-IP interconnections

Authors:
Jinn-Shyan Wang;Keng-Jui Chang;Chingwei Yeh;Shih-Chieh Chang
Affiliations:
Department of Electrical Engineering, Chung-Cheng University, Chai-Yi, Taiwan;Department of Electrical Engineering, Chung-Cheng University, Chai-Yi, Taiwan;Department of Electrical Engineering, Chung-Cheng University, Chai-Yi, Taiwan;Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2013

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Abstract

During systems-on-a-chip (SoC) integration, silicon intellectual properties (IPs) are generally regarded as blockages to long interconnections that connect different IPs. With this constraint, conventional designs are forced to place those repeaters that drive long interconnections outside the IP. These designs either lead to a longer interconnection distance requiring more repeaters or result in a longer signal delay, since the interconnection wire is not appropriately segmented by the repeaters. To solve these problems, we designed the IPs such that designers can embed the repeaters in the IP for the SoC integration. In other words, it allows the cross-IP interconnections to be routed over the IP using repeaters inserted in the IP. The design concept, physical implementation, and application examples of the embedded repeaters are described in this brief. Experimental results show that the proposed design will not only make the floor plan of the SoC easier but will also improve the signal delay and the power consumption of the long interconnection circuits.