Fundamentals of Embedded Software: Where C and Assembly Meet with Cdrom
Fundamentals of Embedded Software: Where C and Assembly Meet with Cdrom
FoCs: Automatic Generation of Simulation Checkers from Formal Specifications
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Assertion-Based Design
The Pragmatics of Model-Driven Development
IEEE Software
Efficient embedded software design with synchronous models
Proceedings of the 5th ACM international conference on Embedded software
Unified Property Specification for Hardware/Software Co-Verification
COMPSAC '07 Proceedings of the 31st Annual International Computer Software and Applications Conference - Volume 01
Verification of temporal properties in automotive embedded software
Proceedings of the conference on Design, automation and test in Europe
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
Generating Hardware Assertion Checkers: For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring
Optimized temporal monitors for SystemC
RV'10 Proceedings of the First international conference on Runtime verification
A Comparative Study of Software Model Checkers as Unit Testing Tools: An Industrial Case Study
IEEE Transactions on Software Engineering
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Assertion-based verification (ABV) is more and more used for verification of embedded systems concerning both HW and SW parts. However, ABV methodologies and tools do not apply to HW and SW components in the same way: for HW components, both static ABV and dynamic ABV are widely used; on the contrary, SW components are traditionally verified by means of static ABV, because dynamic approaches are based on simulation assumptions which could not be true during execution of general embedded SW and which cannot be controlled by the assertion language. This paper proposes to exploit model-driven design for guaranteeing such simulation assumptions. Then, it describes an ABV framework for embedded SW, that automatically synthesizes assertion checkers to verify the embedded SW accordingly to the simulation assumptions.