SAFER PATH: security architecture using fragmented execution and replication for protection against trojaned hardware

Authors:
Mark Beaumont;Bradley Hopkins;Tristan Newby
Affiliations:
Defence Science and Technology Organisation, Adelaide, Australia;Defence Science and Technology Organisation, Adelaide, Australia;Defence Science and Technology Organisation, Adelaide, Australia
Venue:
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2012

Citing 10
Cited 1

Integrated circuit security: new threats and solutions

Proceedings of the 5th Annual Workshop on Cyber Security and Information Intelligence Research: Cyber Security and Information Intelligence Challenges and Strategies
Dynamic evaluation of hardware trust

HST '09 Proceedings of the 2009 IEEE International Workshop on Hardware-Oriented Security and Trust
MOLES: malicious off-chip leakage enabled by side-channels

Proceedings of the 2009 International Conference on Computer-Aided Design
A Survey of Hardware Trojan Taxonomy and Detection

IEEE Design & Test
Preventing IC Piracy Using Reconfigurable Logic Barriers

IEEE Design & Test
Overcoming an Untrusted Computing Base: Detecting and Removing Malicious Hardware Automatically

SP '10 Proceedings of the 2010 IEEE Symposium on Security and Privacy
Detecting/preventing information leakage on the memory bus due to malicious hardware

Proceedings of the Conference on Design, Automation and Test in Europe
Silencing Hardware Backdoors

SP '11 Proceedings of the 2011 IEEE Symposium on Security and Privacy
Defeating UCI: Building Stealthy and Malicious Hardware

SP '11 Proceedings of the 2011 IEEE Symposium on Security and Privacy
Hard Disk Guard Based Policy Enforcement

POLICY '11 Proceedings of the 2011 IEEE International Symposium on Policies for Distributed Systems and Networks

Hardware trojan resistant computation using heterogeneous COTS processors

ACSC '13 Proceedings of the Thirty-Sixth Australasian Computer Science Conference - Volume 135

Quantified Score

Hi-index	0.00

Visualization

Abstract

Ensuring electronic components are free from Hardware Trojans is a very difficult task. Research suggests that even the best pre- and post-deployment detection mechanisms will not discover all malicious inclusions, nor prevent them from being activated. For economic reasons electronic components are used regardless of the possible presence of such Trojans. We developed the SAFER PATH architecture, which uses instruction and data fragmentation, program replication, and voting to create a computational system that is able to operate safely in the presence of active Hardware Trojans. We protect the integrity of the computation, the confidentiality of data being processed and ensure system availability. By combining a small Trusted Computing Base with Commercial-Off-The-Shelf processing elements, we are able to protect computation from the effects of arbitrary Hardware Trojans.