Letters: Area-efficient differential Gaussian circuit for dedicated hardware implementations of Gaussian function based machine learning algorithms

Authors:
D. Vrtaric;V. Ceperic;A. Baric
Affiliations:
University of Zagreb, Faculty of Electrical Engineering and Computing, Unska 3, 10000 Zagreb, Croatia;University of Zagreb, Faculty of Electrical Engineering and Computing, Unska 3, 10000 Zagreb, Croatia and KU Leuven, Department of Electrotechnical Engineering, Kasteelpark Arenberg 10, Leuven, Be ...;University of Zagreb, Faculty of Electrical Engineering and Computing, Unska 3, 10000 Zagreb, Croatia
Venue:
Neurocomputing
Year:
2013

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Abstract

A simple and area-efficient differential Gaussian circuit is presented for machine learning dedicated hardware implementations, where Gaussian functions are needed, e.g. for artificial neural networks (as transfer function), support vector machines (as kernel function) and fuzzy logic (as membership function). The proposed Gaussian circuit consists of only 4 transistors. Simulations in the 0.18-@mm CMOS UMC technology show that the proposed circuit is more accurate, less susceptible to the process variations and requires less on-chip area when compared to state-of-the-art.