EUROCRYPT '93 Workshop on the theory and application of cryptographic techniques on Advances in cryptology
Low Cost Attacks on Tamper Resistant Devices
Proceedings of the 5th International Workshop on Security Protocols
IEEE Transactions on Computers
RFID Privacy: An Overview of Problems and Proposed Solutions
IEEE Security and Privacy
RFID privacy issues and technical challenges
Communications of the ACM - Special issue: RFID
Security Standards for the RFID Market
IEEE Security and Privacy
YA-TRAP: Yet Another Trivial RFID Authentication Protocol
PERCOMW '06 Proceedings of the 4th annual IEEE international conference on Pervasive Computing and Communications Workshops
A Lightweight RFID Protocol to protect against Traceability and Cloning attacks
SECURECOMM '05 Proceedings of the First International Conference on Security and Privacy for Emerging Areas in Communications Networks
An RFID Distance Bounding Protocol
SECURECOMM '05 Proceedings of the First International Conference on Security and Privacy for Emerging Areas in Communications Networks
RFID: The Next Serious Threat to Privacy
Ethics and Information Technology
A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks
IEEE Transactions on Computers
692-nW advanced encryption standard (AES) on a 0.13-µm CMOS
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy comparison of AES and SHA-1 for ubiquitous computing
EUC'06 Proceedings of the 2006 international conference on Emerging Directions in Embedded and Ubiquitous Computing
RFID security and privacy: a research survey
IEEE Journal on Selected Areas in Communications
Trust, security and privacy for pervasive applications
The Journal of Supercomputing
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This paper adopts a holistic approach to Radio Frequency Identification (RFID) security that considers security and privacy under resource constraints concurrently. In this context, a practical realisation of a secure passive (battery-less) RFID tag is presented. The tag consists of an off the shelf front end combined with a bespoke 0.18 μm Application Specific Integrated Circuit (ASIC) assembled as a -sized prototype. The ASIC integrates the authors' ultra low power novel Advanced Encryption Standard (AES) design together with a novel random number generator and a novel protocol, which provides both security and privacy. The analysis presented shows a security of 64-bits against many attack methods. Both modelled and measured power results are presented. The measured average core power consumed during continuous normal operation is 1.36 μW.