The pixel machine: a parallel image computer
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
Image-composition architectures for real-time image generation
Image-composition architectures for real-time image generation
A Sorting Classification of Parallel Rendering
IEEE Computer Graphics and Applications
Algorithms for parallel rendering
Algorithms for parallel rendering
A Characterization of Ten Hidden-Surface Algorithms
ACM Computing Surveys (CSUR)
A display system for the Stellar graphics supercomputer model GS1000
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
Synchronization for a multi-port frame buffer on a mesh-connected multicomputer
PRS '95 Proceedings of the IEEE symposium on Parallel rendering
Performance issues of a distributed frame buffer on a multicomputer
HWWS '98 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
Sepia: Scalable 3D Compositing Using PCI Pamette
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Hi-index | 0.00 |
Multicomputers can be effectively used for interactive graphics rendering only if there are mechanisms available to rapidly composite and transfer images to an external display device. One method for achieving the necessary bandwidth for this operation is to provide multiple high-bandwidth ports into a frame buffer. In this paper, we evaluate the design space of a multiport frame buffer design for the Intel Paragon mesh routing network. We use an instrumented rendering system to capture the graphics operations needed for rendering a number of three-dimensional scenes; we then use those workloads as input to test programs running on the Paragon to estimate the performance of our hardware. Our experiments consider three major design questions: how many network ports the frame buffer needs, whether Z-Buffering should be done in hardware on the frame buffer or in software on the computing nodes, and whether the design alternatives are scalable.