The pixel machine: a parallel image computer

  • Authors:
  • Michael Potmesil;Eric M. Hoffert

  • Affiliations:
  • AT&T Bell Laboratories, Holmdel, New Jersey;AT&T Bell Laboratories, Holmdel, New Jersey

  • Venue:
  • SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
  • Year:
  • 1989

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Abstract

We describe the system architecture and the programming environment of the Pixel Machine - a parallel image computer with a distributed frame buffer.The architecture of the computer is based on an array of asynchronous MIMD nodes with parallel access to a large frame buffer. The machine consists of a pipeline of pipe nodes which execute sequential algorithms and an array of m × n pixel nodes which execute parallel algorithms. A pixel node directly accesses every m-th pixel on every n-th scan line of an interleaved frame buffer. Each processing node is based on a high-speed, floating-point programmable processor.The programmability of the computer allows all algorithms to be implemented in software. We present the mappings of a number of geometry and image-computing algorithms onto the machine and analyze their performance.