Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
Operating system support for high-performance multiprocessing
Operating system support for high-performance multiprocessing
Scheduling for locality in shared-memory multiprocessors
Scheduling for locality in shared-memory multiprocessors
Parallel architectural simulations on shared-memory multiprocessors
Parallel architectural simulations on shared-memory multiprocessors
WSC '93 Proceedings of the 25th conference on Winter simulation
Parallel discrete event simulation on shared-memory multiprocessors
ANSS '91 Proceedings of the 24th annual symposium on Simulation
A design verification methodology based on concurrent simulation and clock suppression
DAC '83 Proceedings of the 20th Design Automation Conference
Table lookup techniques for fast and flexible digital logic simulation
DAC '80 Proceedings of the 17th Design Automation Conference
Issues in shared memory multiprocessor scheduling: a performance evaluation
Issues in shared memory multiprocessor scheduling: a performance evaluation
Parallel logic simulation: an evaluation of centralized-time and distributed-time algorithms
Parallel logic simulation: an evaluation of centralized-time and distributed-time algorithms
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This paper describes a novel data structure and an algorithm for processor self-scheduling in parallel discrete event simulation. The presented data structure allows the efficient scheduling of future computations, it facilitates the inexpensive use of processor affinity information, it reduces the contention on the scheduling queue, and it integrates load balancing and locality management methods into a single mechanism. We use the behavioral simulation of a multiprocessor system to characterize the behavior of the proposed data structure and the associated scheduling algorithm. The results of our study show that it is important to maintain as detailed affinity information as possible and exploit this information at run time.