Fanout-tree restructuring algorithm for post-placement timing optimization

Post-layout optimization for deep submicron design

DAC '96 Proceedings of the 33rd annual Design Automation Conference

Physical design CAD in deep sub-micron era

EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation

A low-power design method using multiple supply voltages

ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design

Fanout optimization under a submicron transistor-level delay model

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design