Fanout optimization under a submicron transistor-level delay model

  • Authors:
  • P. Cocchini;M. Pedram;G. Piccinini;M. Zamboni

  • Affiliations:
  • Politecnico di Torino, Torino, Italy;Univ. of Southern California, Los Angeles, CA;Politecnico di Torino, Torino, Italy;Politecnico di Torino, Torino, Italy

  • Venue:
  • Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 1998

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Abstract