A heuristic algorithm for the fanout problem
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Timing optimization on mapped circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
LATTIS: an iterative speedup heuristic for mapped logic
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Routability-driven fanout optimization
DAC '93 Proceedings of the 30th international Design Automation Conference
Resynthesis of multi-phase pipelines
DAC '93 Proceedings of the 30th international Design Automation Conference
Logic decomposition during technology mapping
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Design of a logic synthesis system (tutorial)
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Buffered Steiner tree construction with wire sizing for interconnect layout optimization
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Minimum padding to satisfy short path constraints
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
A simple algorithm for fanout optimization using high-performance buffer libraries
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Wire segmenting for improved buffer insertion
DAC '97 Proceedings of the 34th annual Design Automation Conference
Delay bounded buffered tree construction for timing driven floorplanning
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs
Proceedings of the 1997 international symposium on Physical design
A fast fanout optimization algorithm for near-continuous buffer libraries
DAC '98 Proceedings of the 35th annual Design Automation Conference
Fanout optimization under a submicron transistor-level delay model
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Performance optimization under rise and fall parameters
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
On the global fanout optimization problem
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Efficient global fanout optimization algorithms
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Technology-based transformations
Logic Synthesis and Verification
Simultaneous gate sizing and fanout optimization
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
An exact gate assignment algorithm for tree circuits under rise and fall delays
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Minimum-buffered routing of non-critical nets for slew rate and reliability control
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Interconnect-Dominated VLSI Design
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Layout-driven Timing Optimization by Generalized De Morgan Transform
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A fast and efficient algorithm for determining fanout trees in large networks
EURO-DAC '91 Proceedings of the conference on European design automation
Wire length prediction-based technology mapping and fanout optimization
Proceedings of the 2005 international symposium on Physical design
Low-power fanout optimization using multiple threshold voltage inverters
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Single-track asynchronous pipeline controller design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Low-power fanout optimization using multi threshold voltages and multi channel lengths
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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