Modeling, design and implementation of a low-power FPGA based asynchronous wake-up receiver for wireless applications

Authors:
Pons Jean-François;Brault Jean-Jules;Savaria Yvon
Affiliations:
Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, Canada and STMicroelectronics, Grenoble, France and IM2NP Department, Aix-Marseille University and CNRS, Marseille, ...;Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, Canada;Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, Canada
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2013

Citing 8
Cited 0

Micropipelines

Communications of the ACM
An Efficient Implementation of Boolean Functions as Self-Timed Circuits

IEEE Transactions on Computers
NULL Convention Logic/sup TM/: A Complete And Consistent Logic For Asynchronous Digital Circuit Synthesis

ASAP '96 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Intelligent Mobile Agent Middleware for Wireless Sensor Networks: A Real Time Application Case Study

AICT '08 Proceedings of the 2008 Fourth Advanced International Conference on Telecommunications
Low-Power 2.4 GHz Wake-Up Radio for Wireless Sensor Networks

WIMOB '08 Proceedings of the 2008 IEEE International Conference on Wireless & Mobile Computing, Networking & Communication
An Ultra Low Power Wakeup Receiver for Wireless Sensor Nodes

SENSORCOMM '09 Proceedings of the 2009 Third International Conference on Sensor Technologies and Applications
A low power listening MAC with scheduled wake up after transmissions for WSNs

IEEE Communications Letters
Designing Asynchronous Circuits using NULL Convention Logic (NCL)

Designing Asynchronous Circuits using NULL Convention Logic (NCL)

Quantified Score

Hi-index	0.00

Visualization

Abstract

Power consumption is a major concern for wireless sensor networks (WSNs) nodes, and it is often dominated by the power consumption of communication means. For such networks, devices are most of the time battery-powered and need to have very low power consumption. Moreover, for WSNs, limited amount of data are periodically sent and then the radio should be in idle or deep sleep mode most of the time. Thus using event-triggered radios is well suited and could lead to significant reduction of the overall power consumption of WSNs. Therefore this paper explores the design of an asynchronous module that can wake up the main receiver when another node is trying to send data. Furthermore, we implement the proposed solution in an FPGA to decrease the fabrication cost for low volume applications and make it easier to design, re-use and enhance. To decrease the static power consumption, we explore the possibility of reducing the supply voltage. The observed overall power consumption is under 5 μW at 250 kbps. Moreover, using a new asynchronous design technique, we observed that power consumption can be further reduced.