System design methodologies: aiming at the 100 h design cycle

Authors:
Daniel D. Gajski;Sanjiv Narayan;Loganath Ramachandran;Frank Vahid;Peter Fung
Affiliations:
-;-;-;-;-
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
1996

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Abstract

As methodologies and tools for chip-level design mature, design effort becomes focused on increasingly higher levels of abstraction. We present a tutorial on a design methodology for chip and system design and present a test case that justifies the future goal of a 100 h design cycle.