Communications of the ACM - Special section on computer architecture
The Computer Journal
Average case analysis of greedy routing algorithms on arrays
SPAA '90 Proceedings of the second annual ACM symposium on Parallel algorithms and architectures
The Twisted N-Cube with Application to Multiprocessing
IEEE Transactions on Computers
Transputers and parallel architectures: message-passing distributed systems
Transputers and parallel architectures: message-passing distributed systems
The turn model for adaptive routing
Journal of the ACM (JACM)
Flexible oblivious router architecture
IBM Journal of Research and Development
A High Performance Pattern Associative Oblivious Router for Tree Topologies
Proceedings of the 8th International Symposium on Parallel Processing
Architecture of a Communication Network Processor
PARLE '89 Proceedings of the Parallel Architectures and Languages Europe, Volume I: Parallel Architectures
A wave-pipelined router architecture using ternary associative memory
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Associative Matrix for Nano-Scale Integrated Circuits
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
Routing direction determination in regular networks based on configurable circuits
Future Generation Computer Systems
Routing direction determination in regular networks based on configurable circuits
Future Generation Computer Systems
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A programmable associative approach to execute implicit routing algorithms is presented. Algorithms are mapped onto a set of bit-patterns that are matched in parallel. We have studied and mapped a large number of routing algorithms for a wide range of interconnection network topologies. Here we report three cases that illustrate the capabilities of the router scheme. For the studied topologies, the number of required bit-patterns is of the same order as the topology degree. The proposed approach is one of the fastest routers and requires a very small amount of hardware.