Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
A Flexible Bit-Pattern Associative Router for Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
Associative Processing and Processors
Associative Processing and Processors
VLSI Design of Neural Networks
VLSI Design of Neural Networks
A Literal Gate Using Resonant-Tunneling Devices
ISMVL '96 Proceedings of the 26th International Symposium on Multiple-Valued Logic
The use of nanoelectronic devices in highly parallel computing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Towards nanocomputer architecture
CRPIT '02 Proceedings of the seventh Asia-Pacific conference on Computer systems architecture
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Moving towards minimum feature sizes of nanometric scale a new computational architecture for future nano-scale integration is presented. Due to the fact that resonant tunneling transistors are very promising devices they are applied to a novel associative matrix architecture. Fault and error tolerance as well as high computational power (word-parallel realization) are inherently related features of such structures that display their full performance in the application presented here. By means of devices with increased functionality relative complex circuit functions are performed at high speed with reduced component counts.