A fast physical constraint generator for timing driven layout
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
BooleDozer: logic synthesis for ASICs
IBM Journal of Research and Development
Circuit placement chip optimization, and wire routing for IBM IC technology
IBM Journal of Research and Development
Circuit placement chip optimization, and wire routing for IBM IC technology
IBM Journal of Research and Development
Circuit Placement, Chip Optimization, and Wire Routing for IBMIC Technology
Journal of VLSI Signal Processing Systems - Special issue on high performance clock distribution networks
Proceedings of the 1997 international symposium on Physical design
CHDStd—application support for reusable hierarchical interconnect timing views
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Net criticality revisited: an effective method to improve timing in physical design
Proceedings of the 2002 international symposium on Physical design
Design topology aware physical metrics for placement analysis
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
SEAS: a system for early analysis of SoCs
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Early analysis tools for system-on-a-chip design
IBM Journal of Research and Development
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Pin assignment using stochastic local search constraint programming
CP'09 Proceedings of the 15th international conference on Principles and practice of constraint programming
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