Chip hierarchical design system (CHDS): a foundation for timing-driven physical design into the 21st century

Performance-driven soft-macro clustering and placement by preserving HDL design hierarchy

ISPD '98 Proceedings of the 1998 international symposium on Physical design

CHDStd—application support for reusable hierarchical interconnect timing views

ISPD '98 Proceedings of the 1998 international symposium on Physical design

Chip-level verification for parasitic coupling effects in deep-submicron digital designs

DATE '99 Proceedings of the conference on Design, automation and test in Europe

Incremental physical design

ISPD '00 Proceedings of the 2000 international symposium on Physical design

Hardware/software instruction set configurability for system-on-chip processors

Proceedings of the 38th annual Design Automation Conference

Quality of EDA CAD Tools: Definitions, Metrics and Directions

ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design

Design flow and methodology for 50M gate ASIC

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference