Complexity issues in VLSI: optimal layouts for the shuffle-exchange graph and other networks
Complexity issues in VLSI: optimal layouts for the shuffle-exchange graph and other networks
Type architectures, shared memory, and the corollary of modest potential
Annual review of computer science vol. 1, 1986
On mapping parallel algorithms into parallel architectures
Journal of Parallel and Distributed Computing
Layered cross product—a technique to construct interconnection networks
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
Optimal emulations by butterfly-like networks
Journal of the ACM (JACM)
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
On routing two-point nets across a channel
DAC '82 Proceedings of the 19th Design Automation Conference
A complexity theory for VLSI
Compact grid layouts of multi-level networks
STOC '99 Proceedings of the thirty-first annual ACM symposium on Theory of computing
AT2L2 o N2/2 for fast fourier transform in multilayer VLSI
Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures
On the Bisection Width and Expansion of Butterfly Networks
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
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