Tight bounds on the complexity of parallel sorting
IEEE Transactions on Computers
Towards an architecture-independent analysis of parallel algorithms
SIAM Journal on Computing
Combinatorial algorithms for integrated circuit layout
Combinatorial algorithms for integrated circuit layout
Introduction to parallel algorithms and architectures: array, trees, hypercubes
Introduction to parallel algorithms and architectures: array, trees, hypercubes
Fast Parallel Sorting Under LogP: Experience with the CM-5
IEEE Transactions on Parallel and Distributed Systems
A tight layout of the butterfly network
Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures
Layout of the batcher bitonic sorter (extended abstract)
Proceedings of the tenth annual ACM symposium on Parallel algorithms and architectures
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
STOC '79 Proceedings of the eleventh annual ACM symposium on Theory of computing
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
On routing two-point nets across a channel
DAC '82 Proceedings of the 19th Design Automation Conference
Sorting networks and their applications
AFIPS '68 (Spring) Proceedings of the April 30--May 2, 1968, spring joint computer conference
Some compact layouts of the butterfly
Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures
VLSI layout and packaging of butterfly networks
Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures
Multilayer VLSI Layout for Interconnection Networks
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
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