Some compact layouts of the butterfly

Authors:
Yefim Dinitz;Shimon Even;Roni Kupershtok;Maria Zapolotsky
Affiliations:
Dept. of Mathematics and Comp. Sci., Ben-Gurion Univ., Be'er Sheva, Israel;Computer Sci. Dept., Technion - Israel Inst. of Tech., Haifa, Israel;Computer Sci. Dept., Technion - Israel Inst. of Tech., Haifa, Israel;Computer Sci. Dept., Technion - Israel Inst. of Tech., Haifa, Israel
Venue:
Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures
Year:
1999

A Unified theory of interconnection network structure

Theoretical Computer Science
A graph theoretical approach to equivalence of multistage interconnection networks

Discrete Applied Mathematics
Compact grid layouts of multi-level networks

STOC '99 Proceedings of the thirty-first annual ACM symposium on Theory of computing
A Permutation Network

Journal of the ACM (JACM)
On routing two-point nets across a channel

DAC '82 Proceedings of the 19th Design Automation Conference
A complexity theory for VLSI

A complexity theory for VLSI

VLSI layout and packaging of butterfly networks

Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures
AT2L2 o N2/2 for fast fourier transform in multilayer VLSI

Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures
VLSI layout of trees into grids of minimum width

Proceedings of the fifteenth annual ACM symposium on Parallel algorithms and architectures
Multilayer VLSI Layout for Interconnection Networks

ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing

Hi-index	0.00