The representation of multistage interconnection networks in queuing models of parallel systems
Journal of the ACM (JACM)
Traffic studies of unbuffered Delta networks
IBM Journal of Research and Development
Cost-performance tradeoffs for interconnection networks
Discrete Applied Mathematics - Special double volume: interconnection networks
Performance Analysis of Multistage Interconnection Network Configurations and Operations
IEEE Transactions on Computers
Performance Evaluation of Circuit Switched Multistage Interconnection Networks Using a Hold Strategy
IEEE Transactions on Parallel and Distributed Systems
A high speed scheduler/controller for unbuffered banyan networks
Computer Communications
| Hi-index | 14.98 |
In this paper, we study the delay performance of a circuit switched, self-routing Delta network. A gated hold protocol that retains partial path information is used to guarantee service of all requests. A novel technique that involves the construction of an easier to analyze dominant system is presented. A recursive expression for the probability mass function of the cycle time in the dominant system is derived. Comparison of the dominant system analysis with simulation of the actual system shows that the dominant system accurately predicts performance for low network loads. As network loads increase, the dominant system becomes worse at predicting behavior of the actual system. These results also help develop insight into how to trade off higher delay variability for increased throughput.