CryptoBooster: A Reconfigurable and Modular Cryptographic Coprocessor
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Efficient Diminished-1 Modulo 2^n+1 Multipliers
IEEE Transactions on Computers
Design of a low-power, high performance, 8×8bit multiplier using a Shannon-based adder cell
Microelectronics Journal
A Reconfigurable Channel Filter for Software Defined Radio Using RNS
Journal of Signal Processing Systems
The dynamic granularity memory system
Proceedings of the 39th Annual International Symposium on Computer Architecture
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