The design cube: a new model for VHDL designflow representation
EURO-DAC '92 Proceedings of the conference on European design automation
Specification and design of embedded systems
Specification and design of embedded systems
Design and use of a system-level specification and verification methodology
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
System level design, a VHDL based approach
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
System-Level Specification and Design Using VHDL: A Case Study
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
A parallel/serial trade-off methodology for look-up table based decoders
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware reuse at the behavioral level
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A Methodology for Hardware Architecture Trade-off at Different Levels of Abstraction
EDTC '97 Proceedings of the 1997 European conference on Design and Test
ITC '99 Proceedings of the 1999 IEEE International Test Conference
| Hi-index | 0.00 |