Fast Implementation of 3-D Digital Filters Via SystolicArray Processors

Authors:
B. G. Mertzios;A. N. Venetsanopoulos
Affiliations:
Department of Electrical and Computer Engineering, Democritus University of Thrace, 67 100 Xanthi, Greece. E-mail: mertzios@demokritos.cc.duth.gr;Department of Electrical and Computer Engineering, University of Toronto, Toronto M5S 1A4, Canada
Venue:
Multidimensional Systems and Signal Processing
Year:
1997

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Abstract

In this paper a fast implementation architecture ofthree-dimensional (3-D) FIR or IIR digital filters via systolicVLSI array processors is described. The modular structure presentedis comprised of similar processing elements in a linear cascadeconfiguration with local interconnections. High speed throughputrates are attained due to high concurrency, which is achievedby exploiting both pipelining and parallelism. The considered3-D FIR and IIR filters may be used for the processing of reconstructed3-D images and in medical imaging applications.