Using speculative retirement and larger instruction windows to narrow the performance gap between memory consistency models

Authors:
Parthasarathy Ranganathan;Vijay S. Pai;Sarita V. Adve
Affiliations:
Department of Electrical and Computer Engineering, Rice University, Houston, Texas;Department of Electrical and Computer Engineering, Rice University, Houston, Texas;Department of Electrical and Computer Engineering, Rice University, Houston, Texas
Venue:
Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures
Year:
1997

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