A model for hierarchical memory

  • Authors:
  • A. Aggarwal;B. Alpern;A. Chandra;M. Snir

  • Affiliations:
  • IBM T. J. Watson Research Center, P. O. Box 218, Yorktown Heights, New York;IBM T. J. Watson Research Center, P. O. Box 218, Yorktown Heights, New York;IBM T. J. Watson Research Center, P. O. Box 218, Yorktown Heights, New York;IBM T. J. Watson Research Center, P. O. Box 218, Yorktown Heights, New York

  • Venue:
  • STOC '87 Proceedings of the nineteenth annual ACM symposium on Theory of computing
  • Year:
  • 1987

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Abstract

In this paper we introduce the Hierarchical Memory Model (HMM) of computation. It is intended to model computers with multiple levels in the memory hierarchy. Access to memory location x is assumed to take time ⌈ log x ⌉. Tight lower and upper bounds are given in this model for the time complexity of searching, sorting, matrix multiplication and FFT. Efficient algorithms in this model utilize locality of reference by bringing data into fast memory and using them several times before returning them to slower memory. It is shown that the circuit simulation problem has inherently poor locality of reference. The results are extended to HMM's where memory access time is given by an arbitrary (nondecreasing) function. Tight upper and lower bounds are obtained for HMM's with polynomial memory access time; the algorithms for searching, FFT and matrix multiplication are shown to be optimal for arbitrary memory access time. On-line memory management algorithms for the HMM model are also considered. An algorithm that uses LRU policy at the successive “levels” of the memory hierarchy is shown to be optimal.