Fast discrete function evaluation using decision diagrams
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Verification of electronic systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A quantitative approach to functional debugging
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Functional debugging of systems-on-chip
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Si-Emulation: System Verification Using Simulation and Emulation
ITC '00 Proceedings of the 2000 IEEE International Test Conference
A novel approach for digital waveform compression
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Hybrid Approach to Faster Functional Verification with Full Visibility
IEEE Design & Test
A fast two-pass HDL simulation with on-demand dump
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Proceedings of the International Conference on Computer-Aided Design
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Cycle simulators, in-circuit emulators, and hardware accelerators have made it possible to rapidly model the functionality of large digital designs. But these techniques provide limited visibility of internal design nodes, making debugging hard. Simulators run slowly when all nodes are traced. Emulators provide full visibility only with limited depth, or with greatly reduced speed. This paper discusses software techniques for increasing design visibility while reducing tracing overhead in simulation, and achieving 100% visibility in emulation without reducing speed or compromising depth.